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CC4.03 - Role of Dislocation Induced Off-State Gate Leakage in Drain Current Dispersion in Fresh and Stressed AlGaN/GaN Heterostructure Field Effect Transistors 
April 7, 2015   4:15pm - 4:30pm

Current collapse in AlGa(In)N/GaN heterostructure field effect transistors (HFETs) persists as a major reliability constraint in the pathways of widespread realization of III-nitride electronic devices. The phenomenon is marked by the significant decrease in microwave output power in RF PAs and prominent increase in dynamic resistance of power switches. Electrically active states are held responsible for this trap related event, whose capture/emission time governs the corresponding trapping/detrapping mechanisms though the exact origin of the concerned deep levels along with the involved dynamics remains a vastly debated topic. In our earlier studies, transient measurements combined with pulse drive responses of nitride HFETs were analyzed to explore the possibilities of dislocations affecting the current dispersion characteristics. The investigations confirmed that dispersion is strongly correlated with the threading dislocation density (TDD) in the epilayers. However, it was not possible to pinpoint a single mechanism responsible for the trapping during OFF-state quiescent bias though either tunnelling or trap-assisted Frenkel-Poole emission or hopping conduction were the plausible transport mechanisms. Based on previous understandings, in the present study, the analysis was further extended for AlGaN/GaN HFETs fabricated on epistructures with TDDs ~2x108/cm2,~ 7x109/cm2, and ~5x1010/cm2. To replicate practical modes of operations, the quiescent bias point was chosen as VGS in soft-pinch off (~VTh), moderate pinch-off(~VTh-3), or deep pinch-off state(~VTh-6) and VDS varied upto 18 V. Among devices in different wafers, both the current dispersion and the OFF-state gate leakage for identical bias values were found to correspond to the respective TDDs. Also, for devices in the same wafer, the dispersion was dependent upon the reverse bias in a particular pattern. Temperature and field-dependent OFF-state terminal current measurements were assessed for each of these quiescent biases to identify the spatial leakage mechanism at any of the bias states. Next, these devices with TDDs spanning three orders were subjected to step stress bias (without the application of storage thermal stress) upto permanent device degradation featuring large irreversible increase in both RON and current compression as well as OFF-state leakage. Moreover, same bias dependent compression and qualitative leakage current measurements were carried out for the stressed devices. Heteroepitaxial growth being the only commercially feasible option for fabrication of nitride devices, significant TDD generation and propagation throughout the active layers is a given owing to the large epilayer-substrate (SiC,Al2O3,Si) lattice and thermal mismatch. In this regard, this study elucidating the correlation among TDDs, OFF-state leakage and current dispersion in fresh devices, and their evolution in degraded devices provides detailed insights into the reliability barriers of III-N HFETs.

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